1. Field of the Invention
The invention relates in general to an ESD protection circuit, and more particularly to an ESD protection circuit including a diode device and snapback device to form a parasitic SCR.
2. Description of the Related Art
FIG. 1 is a schematic diagram of a semiconductor structure of a conventional ESD protection circuit for a high-voltage input pad of a display. As shown in FIG. 1, the semiconductor structure of an ESD protection circuit includes a P-substrate 100, a diode string 110, a P-ring 120, a p-ring control circuit 130 and an N-type metal oxide semiconductor (NMOS) transistor 140. The diode string 110 is connected to an input pad 150, the NMOS transistor 140 is connected to the diode string 110, and a parasitic silicon-controlled rectifier (SCR) is formed in the P-substrate 100 between the first diode 160 and the NMOS transistor 140. There can be one, two or more diodes in a diode string. The number of the diodes in the diode string 110 can adjust the turn-on voltage of the ESD protection.
In a normal operation, the p-ring control circuit 130 controls the P-ring 120 to avoid the turn-on of the parasitic SCR, while during an ESD event, the parasitic SCR is turned on to release ESD current to achieve the effect of ESD protection. However, how to reduce an area of the ESD protection circuit to meet the requirement of small size is an essential subject in IC development.